SpaceWire Remote Terminal Controller (SpW RTC) development suite
The SpW RTC Development Suite:
ASIC test-bed (open-top box to left)
and PCI-SpW RTC/CAN module
ASIC test-bed (open-top box to left)
and PCI-SpW RTC/CAN module
The major space industry objective addressed by the Italian SME, Aurelia Microelettronica, is to facilitate the design and verification of project-specific on-board applications which make use of the SpaceWire (SpW) protocol.
The Challenge
The main innovation demanded by this project has been to establish a development environment that combines software tools, hardware, and test equipment in one package, incorporating the possibility for extension with user hardware or software, and yet providing a software development suite which is simple enough for use in the standard office.Specifications are that the development suite should offer software developers a proper environment to support evaluation and software development of SpaceWire Remote Terminal Controller (SpW RTC)-based designs.The statement of work established a number of key requirements on the hardware segment of the development suite, covering:
- standards compliance for SpW and Controller Area Network (CAN) interfaces;
- availability and usability of all SpW RTC interfaces; and
- specific memory types and sizes.
Schematic of PCI-SpW/CAN and RTC Test-Bed boards
Support for CAN is vital, since CAN is widely employed as the protocol-of-choice for the bus management of low-speed spacecraft control and sensor acquisition networks.SpaceWire, on the other hand, has been specifically implemented to furnish the space-standard high bandwidth communication link protocol for bulk data transfers.SpW is therefore destined to be widely deployed in the planning of new missions. The “PCI-SpW/CAN” module, supported by a library of specific low-level device drivers, therefore offers an agile and flexible testing tool which is well suited for exploitation in future envisaged space missions.
Achievements
PCI-SpW RTC/CAN board module
So as to maximise the capability to interface to other hardware & software, the approach adopted here has been to authorise flexibility by developing a field-programmable gate array (FPGA) device that can be configured to work inside a standard desktop PC as a Peripheral Component Interconnect (PCI) board.Alternatively, the “PCI-SpW/CAN” board module can be enclosed in an external USB case with up to 2 CAN, 2 MILSTD 1553B, and 8 SpW ports.
Several innovative concepts are implemented in the architecture of the PCI-SpW/RTC/CAN board:
- Compactness: Two CAN Controllers and two SpW ports are hosted on the same single board.
- Flexibility: CAN and SpW modules are Register Transfer Level (RTL) Core instances embedded in a large FPGA. They can be easily modified or enhanced to follow any new protocol updates and features.
- Maintainability: A custom FPGA programming scheme (Aurelia A-AltPrg1) is implemented on the board to allow users to update the FPGA image, with no need for vendor-specific SW/HW tools or licences. Users can load the new programming image directly through the PCI bus.
- Simplicity: The software developer is provided with a single API for all the communication links. The entire set of internal buffers and control registers are easily accessible, since they are mapped into a uniform memory segment in the PCI space.
Schematic of SpW RTC Development Suite configuration
Designed for use in a standard PC desktop environment, the “RTC test-bed” is the external test board where the SpW RTC ASIC under test is housed, in addition to peripheral units such as 12-bit ADC/DAC and memory modules (32kB FIFO, 16MB SRAM, 16MB Flash, 128kB EEPROM). The board (double EuroCard size) is enclosed in an ABS case, and can function independently of external laboratory equipment.Furthermore, the test-bed includes the possibility to interface custom-made daughter boards via mezzanine connectors.Users can take advantage of the FIFO or ADC/DAC interfaces for bread-boarding of instrument control modules or custom-made FPGA designs.The entire development suite has been successfully utilised to execute the functional verification of an SpW-RTC ASIC prototype. The sample device under test has been validated as capable of communication with all SpW/RTC/CAN interfaces, without reserve. Characteristics validated include:
- The two SpW ports lock and communicate up to 200 Mbit/s.
- The CAN bus controller communicates with data rates ranging from 125 Kbit/s to 1 Mbit/s.
- UART port has been utilised at 115200 bit/s.
- GPIO and UART lines have been verified working for slow handshakes with a 1m parallel cable without additional buffering.
Project Details
SpaceWire Remote Terminal Controller (SpW RTC) development suite
LET-SME contract no. 20335
- Year of award: 2006
- Amount of funding: €200000
- Completion: Sept. 2008
SME Prime contractor:
Aurelia Microelettronica (CAEN AURELIA SPACE) Srl
Viareggio, Italy
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