Completed ASIC developments (recent)
Essential Telemetry Support ASIC (ETM-ASIC)
Preliminary datasheet of the Essential Telemetry Support ASIC, currently under development by DUTH/SRL and SPACE-ASICS.
Date: September 2007 (pdf)
Will be the ASIC version of the previous SCOC1 study, featuring the LEON3 processor with GRFPU, TM/TC interfaces, various on-board interfaces (Spacewire, CAN, 1553), time management.
Date: The development is entering the Architectural Design phase in Q1/2007 (pdf)
SpaceWire-RTC (Remote Terminal Controller)
An intelligent bridge between the SpaceWire backbone network and CAN, embedding the LEON2-FT microprocessor.
Date: ESA press release, announcment on Spacewire website (pdf)
Connecting 8 spacewire ports and two 8-bit FIFO ports.
Date: September 2005 (pdf)
A 32-bit Sparc V8 microprocessor, based on the LEON2-FT IP core
Date: November 2006.
The LEON-FT VHDL model is a SEU fault-tolerant SPARC V8 processor developed for future space missions. It has been implemented by ESA on a 0.18 um commercial technology from UMC using the commercial VMC (Virtual Silicon Technologies) libraries. Layout and manufacturing services were provided by IMEC/Europractice. A validation and prototyping board was manufactured by Gaisler Research and Pender Electronic Design, and the chip was SEU tested at ESTEC's Californium facilities. Board and a limited supply of chips are available as advance-prototypes for the upcoming Atmel AT697 component (LEON-FT in 0.18 uym rad-hard technology).
The IRIS3 CMOS Active Pixel Sensor
As a new member of the Integrated Radiation Tolerant Imaging System (IRIS) family, the IRIS3 sensor has been developed under ESA contract 13716. IRIS3 is a 1024x768 pixel imager, including on-chip sequencing/windowing features, CCSDS packetising, SDRAM interface. It has undergone electrooptical characterisation and radiation tests, demonstrating a total dose hardness up to 30 krad. For further information, please refer to FillFactory. (pdf)
The flight version of this GPS/GLONASS baseband processor was designed as an ESA internal project and manufactured as Atmel standard component T7905. A paper describing the development of AGGA-2, and the datasheet for the Atmel T7905 ASIC, are available for download.(pdf)
The EVI32 (ERC32 VME-bus Interface) chip T7907E
The EVI32 VHDL core, adapted to work with the ERC32 three chip and single chip processors, as well as the 21020 DSP, has been implemented by Astrium Velizy to the T7907E chip (datasheet) under ESA contract 13345. This chip shall be commercialised by Atmel. (pdf)
The ERC32 Microprocessor Family
Documentation on the two ERC32 32-bit Sparc V7 microprocessors (3 chip-set and single-chip) for space applications, developed under ESA programme between 1993 -1999. (pdf)
SCTMTC (Single Chip Telemetry Telecommand ASIC)
Successor of the obsolete VCM/VCA chipset.
Date: Users Manual Issue 11, March 2006 (pdf)
SMCS-Spacewire, SMCS332-SpW and SMCS116-SpW
Are upgrades to the Spacewire standard of the existing SMCS chips SMCS332 (Atmel TSS901E) and SMCSLite (Atmel T7906E).
Date: February 2004 (pdf)
Last update: 3 December 2014