Synthesizable VHDL core implementing the SpaceWire Codec (including testbenches).
The SpaceWire-b (SpW-b) CODEC is a high speed serial transmitter/receiver compliant with the SpaceWire standard.
The SpaceWire CODEC is responsible for making a connection with the SpaceWire interface at the other end of a link and managing the flow of N-char across the link.
The interface transmits and receives SpaceWire characters which can be link characters (L-Char) or normal characters (N-char).
L-Chars are characters that are used to manage the flow of N-char across a link (NULL & FCT).
N-chars are the characters that are used to pass information across the link (N-char characters, EOP, EEP and TIMECODEs).
(For a non ddr configuration with one system clock and one receive clock)
Total cells : 1158 of 18144 (6.38%)
Combinatorial cells : 739 of 12096 (6.11%)
Sequential cells : 419 of 6048 (6.93%)
SYSCLK = 65 MHz
RX_CLK = 90 MHz
Chris McClements, University of Dundee, 2003
version 2.3, 01-Apr-2009
For a history of bug reports and fixes, modifications, upgrades, etc, please refer to the SpaceWire-b IP Core Release Notes.
An application note describing the complete design flow for implementating the SpaceWire-b CODEC in an Actel RTAX FPGA, along with the complete design database, is also available to licensed users upon request.
Special licensing restrictions
ESA can grant licenses for the use of the SpaceWire-b IP core only for activities funded by the Agency (ESA projects).
The IP core also incorporates the IEEE 1355 High Performance Serial Bus Std (Data/Strobe interface) patented by STMicroelectronics, so an appropriate STMicroelectronics patent notice must be included in the licenses and the final products.
Last update: 14 September 2017