CCSDS Image Data Compression ASIC
CWICOM is a very high-performance image compression ASIC that implements the CCSDS 122.0 wavelet-based image compression standard and that outputs compressed data according to the CCSDS output source packet protocol standard. CWICOM stands for CCSDS Wavelet Image COMpression ASIC, and is developed by EADS Astrium in the frame of an ESA contract. CWICOM is a large dynamic, large images, large compressed rate range, and high speed image compression unit that is potentially relevant for compression of any 2D image with bi-dimensional data correlation. Its highly optimized internal architecture allows performing lossless and lossy image compression at very high data rate (up to 60 Mpixels/s) without any external memory by taking advantage of the on-chip memory (almost 5 Mbits of embedded internal memory). CWICOM is implemented using the largest matrix of the ATMEL ATC18RHA technology, and will be provided into a standard surface mount package CQFP256.
The CCSDS Image Data Compression Standard defines a payload image data compression algorithm that has widespread applicability to many types of instruments and images. EADS Astrium, which has contributed to the definition and the development of this CCSDS 122.0 algorithm, is able to propose with the CWICOM ASIC a highly integrated solution that respects the multi-mission support capabilities offered by this Standard.
In addition to the CCSDS 122.0 wavelet-based image compression standard, CWICOM also implements the CCSDS output source packet protocol standard.
CWICOM benefits from the strong expertise of EADS Astrium in most of the image compression techniques (transform coding, entropy coding, rate regulation) and image compression standards (H261, JPEG DCT, JPEG-LS, JPEG2000 Wavelet) to integrate all the required high level performances with a really easy-to-use interface.
CWICOM brings a very powerful, cost-effective and highly integrated solution for any image compression application as it performs CCSDS image compression treatments without requiring any external memory. The simplicity of such a stand-alone implementation is achieved thanks to a very efficient internal embedded memory organization which gets rid of extra memory chip procurement and so of the potential obsolescence created by any bound to be specific external memory interface.
Beyond the surface saving, it offers the simplest possible implementation for any upcoming compression equipment in a standard CQFP256 surface mount package.
PRDC (Payload Rice Data Compressor) ASIC
The PRDC (Payload Rice Data Compressor)is the ASIC data compressor developed within an European Space Agency (ESA) project, that implements the Rice algorithm for lossless data compression, which has been recommended by CCSDS. The Rice algorithm is an adaptive noiseless, i.e. no loss, algorithm that is particularly useful for encoding data of variable entropy. The device implements an extension to the Rice algorithm outside the CCSDS definition. It is however always possible to disable these extensions in order to comply with the standard Rice algorithm. The output of the PRDC is however fully compliant with a standard Rice decompressor. The PRDC is able to handle samples with a size of 4 up to 24 bits, except for the case when prediction is enabled and mapping is disabled then only sample sizes up to 23 bits are supported. From a technological point of view, the PRDC ASIC is a radiation-hardened component. The manufacturing process is ATMEL MG1RT 0.6 μm SCMOS2/2RT with 3 metal layers. The complexity is in the order of 70 Kgates.
Last update: 29 April 2014