Leon Emulation Board (LEB) and LeonSVF


LEB - Leon Emulation Board
   
LEB - Leon Emulation Board
 
The Leon Emulation Board (LEB) is a powerful simulation module for Leon-based Systems on Chip (SoC). It enables implementing fully representative and high-performance system simulators for embedded software validation, functional verification and operations verification.
 
The LEB is a PCIe board which connects software simulations to the Leon processor VHDL clocked at 100 Mhz in an FPGA for full representativity and maximum performance. It is controlled by software which provides essential simulation facilities such as scheduling, I/O simulation, GDB server and an API compatible with the TSIM(1).

The LEB emulates both Leon2 and Leon3 processors. The Leon2 configuration embeds the LEON2FT from the Atmel AT697F processor with GRFPU(1). The LEON3 design is based on the LEON3 GRLIB(1) and GRFPU(1).

A number of reusable building blocks enable efficient hybrid simulation virtually of any SoC, e.g. the Airbus DS SCOC3. The AMBA Bridge enables software simulation of IP Cores mounted on the AMBA bus; the SpaceWire Bridge transfers SpaceWire packets between the Leon SoC and the software simulations.

The GDB server also enables debugging the On board Software running on the board.

The LEB delivers representativity and performance higher than software-based instruction-set simulators.
 
 
Simulation Specifications

  • LEON2FT and LEON3 with GRFPU(1)
  • 4+4MB LEON PROM + EEPROM
  • 16MB LEON SRAM at 0 wait states
  • 64MB LEON SDRAM
  • S/W simulation on LEON I/O space
  • 4+4 MB for fast simulation of I/O mapped memories
  • S/W simulation on APB&AHB AMBA bus
  • UART characters connected to S/W simulations
  • SpaceWire packets connected to S/W simulations
  • Compatible with TSIM(1)
  • Reconfigurable Control Software & VHDL designs
  • GDB Server
  • Save and Restore
  • Linux 32bits software
  • Simulation software under ESA license - license handling fee may apply
FPGA board specifications
  • PCI Express x4 Gen1
  • LEON @ 100Mhz
  • 32MB SRAM at 0 wait states
  • 64MB SDRAM
  • Less than 10,000 EUR (please request a quotation from Ingespace)
Simulation Building Blocks
  • Timed Events manager
  • AMBA Bridge
  • UART bridge
  • SpaceWire Bridge

Note 1 : TSIM, GRLIB, GRFPU are products by Aeroflex-Gaisler
 
 
System architecture design
 
System architecture design
 
 
 
ESA logo
   
Contacts
 
Mauro CALENO
ESA/ESTEC, The Netherlands
Tel: +31 71 565 4082
Mauro.Caleno@esa.int
 
 
   
Ingespace SARL, France
Tel: +33 53 108 1605
contact@ingespace.com
 
 
ESA logo
   
Grégory QUERE
AIRBUS Defence and Space, France
Tel: +33 56 219 5146
gregory.quere@astrium.eads.net
 
 
 
Last update: 26 May 2014