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Final Industry Reports
 
The following is a list of Final Reports and Executive Summaries of ESA contracts led by the Microelectronics section. These documents are posted publically, with the consent of the ESA contractors and never disclosing company confidential information, in order to facilitate the dissemination of the technology achievements and progress accomplished by our space industry. The results of these contracts have also been presented in Microelectronics Presentation Days and other international workshops and conferences.

FT-Unshades Experience
FT-Unshades SEU Emulations to the LEON2 processor, comparing the unprotected version, the LEON2-FT (fault-tolerance in source code) and a version protected by Xilinx TMR tool.

  • Prime contractor: University of Seville
  • Date: Feb 2006 (pdf)

    Flexwave-II
    Development of a Wavelet Image Compression IP and Implementation on an FPGA Demonstrator board.

  • Prime contractor: IMEC, Belgium
  • Date: August 2005 (pdf)

    IRIS3
    Development of a Rad-Hard CMOS Image Sensor and an Integrated Microcamera.

  • Prime contractor: IMEC, Belgium
  • Date: August 2005 (pdf)

    HSDEM
    A high-speed digital modulator has been developed under the ARTES 3 program. An Engineering Qualification Model (EQM) of the modulator was successfully built and tested.

  • Prime contractor: ComDev, Canada
  • Date: July 2005 (pdf)

    FT-UNSHADES
    SEU Fault-Tolerance Validation of ASIC designs by fault injection using an SRAM based FPGA.

  • Prime contractor: University of Seville
  • Date: May 2005 (pdf)

    ACS
    A full-custom Autocorrelation Spectrometer Chipset, comprising a bipolar 3-level quantiser, a 128-channel and a 1024-channel correlator chip, both in CMOS.

  • Prime contractor: Omnisys, Sweden
  • Date: March 2005 (pdf)

    DARE
    Design Against Radiation Effects - Analysis and validation of the possibility to use a commercial standard technology of which radiation withstanding could be improved by design, at library level.

  • Prime contractor: IMEC, Alcatel Space,
  • Date: November 2004 (pdf)

    SCOC
    Spacecraft Controller On-a Chip - Definition, development and demonstration on FPGA of a complex System-On-Chip device (other documents/presentations).

  • Prime contractor: EADS-Astrium Velizy
  • Date: June 2004 (pdf)

    LEONUMC
    Development and SEU testing of the LEON2FT processor in commercial UMC 0.18um technology.

  • Prime contractor: IMEC, ESA internal, Gaisler Research
  • Date: May 2004 (pdf)

    BroadCast
    A flexible modem platform serving WCDMA- like and related communications needs has been designed, implemented and thoroughly tested in the field.

  • Prime contractor: Sirius/Agilent (B)
  • Date: May 2003 (pdf)

    ChipSat
    A System-on-a-Chip for Small Satellite Data Processing and Control.

  • Prime contractor: Surrey Space Centre (UK)
  • Date: March 2003 (pdf)

    T@MPO
    A High Throughput Turbo Codec at Minimum Power.

  • Prime contractor: IMEC (B)
  • Date: February 2003 (pdf)

    GNSS Front-End
    Feasibility Study for a low risk, low cost, low power fully integrated front end in deep-sub-micron CMOS.

  • Prime contractor: ChipIdea (Portugal)
  • Date: Jan. 2003 (pdf)

    SRAM based FPGA
    The Use of SRAM Based FPGA in Space. Several documents are the output of this study contract.

  • Prime contractor: Gaisler Research (S)
  • Date: 2002

    MSREM
    Miniaturised Standard Radiation Environment Monitor.

  • Prime contractor: Contraves (CH)
  • Date: August 2002 (pdf)

    FFASIC
    Fixed Function ASICs: Radiation-Hardened by design on deep-submicron commercial technology.

  • Prime contractor: IMEC (B)
  • Date: April 2002 (pdf)

    80S32
    Microcontroller 80S32 for On-Board Data Handling.

  • Prime contractor: ADV/Transwitch (F)
  • Date: July 2001 (pdf)

    Circumventing Radiation Effects by Logic Design
    One of the objectives of this R&D is to write a design manual for helping the designers to take into account the Single Event Upset (SEU) and Single Event Latchup (SEL) aspects. This manual first describes the space origin of the ionising particles leading to Single Event Upsets in electronic systems, and then gives some explanations about the physical aspects of Single Event Effects (SEE). The manual also serves as a cookbook, giving “design recipes” for chip protections against SEU and SEL. These recipes can be either at function level or at cell level for ASIC design.

  • Prime contractor: Astrium SAS (F), IMEC (B)
  • Date: May 2001 (Executive Summary) (pdf)
               July 1999 (Radiation Hardening by Design: Cookbook) (pdf)  
     
    Last update: 1 July 2009
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    Related articles
    The LEONUMC Test-Chip ImplementationSRAM based FPGA
    Related documents
    FT-Unshades Experience (pdf)Flexwave-II (pdf)IRIS3 (pdf)HSDEM (pdf)ACS (pdf)DARE (pdf)SCOC (pdf)BroadCast (pdf)ChipSat (pdf)T@MPO (pdf)GNSS Front-End (pdf)MSREM (pdf)FFASIC (pdf)80S32 (pdf)Radiation Hardening by Design : Executive Summary (pdf)Radiation Hardening by Design: Cookbook (pdf)
     
     
     
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