ESA title
Enabling & Support

CUC-CTM

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ESA / Enabling & Support / Space Engineering & Technology / Microelectronics

CUC-CTM stands for "CCSDS Unsegmented Code (CUC) & CCSDS Time Manager (CTM)".

Overview

The CCSDS Unsegmented Code (CUC) synthesizable VHDL core provides basic time keeping functions such an Elapsed Time counter according to the CCSDS Unsegmented Code specification. It provides support for setting, sampling and correlating the ET counter. It also comprises a frequency synthesizer with which a binary frequency is generated to drive the Elapsed Time counter.

The CCSDS Time Manager (CTM) synthesizable VHDL core provides the following additional time services, based on the Elapsed Time counter implemented in the embedded CCSDS Unsegmented Code (CUC) synthesizable VHDL core:

  • Datation services that sample the ET counter value on external events.
  • Alarm services that generate an interrupt when the ET counter value matches arbitrary alarm times.
  • Independent counter that maintains a fine time CUC compliant counter, for the generation of periodic pulses with periods less than one second.
    (This counter is not effected by time setting, sampling or correlation of the aforementioned ET counter.)
  • Dedicated datation service for sampling the ET counter value on the occurrence of the time strobe generated by the Packet TeleMetry Encoder (PTME), generating a Standard Spacecraft Time Source Packet according to the ESA Packet Telemetry Standard (Packet Telemetry Standard, ESA PSS-04-106, Issue 1, January 1988)
Simplified block diagram of the CUC and CTM cores
Simplified block diagram of the CUC and CTM cores

All services in the CTM VHDL core and those comprised in the embedded CUC VHDL core are accessible via a primary AMBA APB slave interface.

All incoming events and outgoing alarms and pulses are also reported through a general interrupt signal that is handled by an interrupt manager.

The Standard Spacecraft Time Source Packet is also available through a secondary AMBA APB slave interface on the CTM VHDL core.

Area/Speed Results

CTM Area on Xilinx Virtex-E
1200 LUT, 764 DFF, 2 ext. I/O

Developer

Sandi Habinc, ESTEC/ESA, 2000

Current Release

version 0.2, December 2003

For a history of bug reports and fixes, modifications, upgrades, etc, please refer to the CUC-CTM IP Core Release Notes.

Special licensing restrictions

None

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