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Enabling & Support

Completed ASIC developments (older)

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ESA / Enabling & Support / Space Engineering & Technology / Microelectronics

Recent Developments In High-End CMOS Image Sensors

CMOS imagers are generally tauted as being particularly suited to the harsh space environment, if only they could get their performance up to CCD levels. This paper highlights present-day high-end CMOS APS sensors from the commercial and industrial world. In addition, the current state of radiation tolerance is discussed.

  • Authors: Sandi Habinc (ESA/ESTEC TOS-ESM), et al (pdf available)

PDFE - a Particle Detector Front-End ASIC

The PDFE is a low power, low noise mixed analogue-digital CMOS ASIC used for particle spectroscopy. The ASIC is directly connected to the detector and does all the analogue signal processing up to analogue-to-digital conversion.

  • Authors: Jan Wouters et al. (IMEC), Sandi Habinc (ESA/ESTEC TOS-ESM), Bengt Johlander (ESA/ESTEC SCI-SO), et al (pdf available)

Dynamical Binning for High Angular Rate Star Tracking

This paper describes a concept, called dynamical binning, for enhancing the robustness of star trackers to high angular rates. The proposed concept aims to de-spread the star image by over sampling and combining the pixel read-outs from successive sub samples in a manner that compensates for the motion of the star image.

  • Authors: Sandi Habinc (ESA/ESTEC TOS-ESM), Richard Creasey (ESA/ESTEC TOS-ES), et al (pdf available)

Smart Sensors in Spacecraft Monitoring Applications

With more than 500 conventional sensors on a medium sized spacecraft there is a substantial application potential for smart sensor technology which is not exploited today. This paper gives an overview of Space applications and the Space infrastructure in place. Current initiatives of the European Space Agency on the development of smart sensor systems for future space missions are presented.

  • Authors: Bernhard Hufenbach (ESA/ESTEC MSM-HP), Sandi Habinc (ESA/ESTEC TOS-ESM) and Pierrik Vuilleumier (ESA/ESTEC TOS-EST) (pdf available)

Development of an Advanced GPS GLONASS ASIC

This paper presents the second generation radiation tolerant Advanced GPS GLONASS ASIC, the AGGA-2, implementing the core digital signal processing for combined GPS and GLONASS receivers. The AGGA-2 supports a wide range of space related applications, both for single-frequency (C/A-code) and dual-frequency (both C/A- and P-code) receivers. The paper describes the principles of GPS operation, followed by a list of applications targeted by the AGGA-2, typical receiver configurations and an overview of the AGGA-2 functionality.

  • Authors: Peter Sinander (ESA/ESTEC TOS-ESM) and Pierluigi Silvestrin (ESA/ESTEC APP-JPP)
  • The AGGA2 is available as Atmel standard component T7905E.
  • Datasheet: ESA ftp server or Atmel pages (pdf available)

Development Plan for Turbo Encoder Core and Devices Implementing the Updated CCSDS Telemetry Channel Coding Standard

A new coding scheme known as Turbo Coding is being introduced in the telemetry channel coding recommendations from the Consultative Committee for Space Data Systems (CCSDS). As turbo coding is being considered for several European scientific spacecraft, the development of a turbo encoder core and devices, with the associated ground system, has been undertaken by the European Space Agency (ESA).

  • Author: Sandi Habinc (ESA/ESTEC TOS-ESM), et al (pdf available)

PETRA - Packetised Essential Telemetry Retrieval ASIC

The PETRA is a mixed analogue/digital device demonstrating a novel concept for retrieving sensor data on-board spacecraft: each PETRA chip can connect up to 40 analogue or digital sensors which are sampled at a nominal period between 10 ms and 50 s. The sensor data is output as CCSDS compliant Telemetry packets. Several PETRA chips can be cascaded in a chain, to be able to connect as many sensors as required. This first demonstrator has been implemented in a commercial non radiation-hard technology from AMS.

  • Author: Dermott MacEvilly (SSL). The complete PETRA Preliminary Data Sheet can be provided upon request.

Support space research, including space science and applications, conducted exclusively for peaceful purposes. (pdf available)

An Autonomous CCSDS Packet Generating ASIC for Analogue and Digital Telemetry

The Packetised Essential Telemetry Retrieval ASIC (PETRA) is a mixed analogue/digital chip for retrieving sensor data on-board spacecraft. This paper introduces the advantages of using the PETRA in a spacecraft's Data Handling System compared to a traditional implementation.

  • Authors: Debbie Reddy (SSL), Peter Sinander (ESA/ESTEC TOS-ESM), et al (pdf available)

A Single-chip CCSDS Packet Telemetry and Telecommand Based Microcamera

By applying the packet telemetry and telecommand standards endorsed by the European Space Agency (ESA) and the Consultative Committee for Space Data Systems (CCSDS) to a microcamera, the need for support from the on-board data handling system can almost be eliminated. If the microcamera is designed with interfaces that fully match those of the telemetry and the telecommand subsystem, the additional interface components will be reduced to simple transceivers.

  • Authors: Werner Ogiers (IMEC, Sandi Habinc (ESA/ESTEC TOS-ESM), et al (pdf available)

Miniaturised Microcontroller based Read-out Electronics for Space Applications

The Particle Detector Front End (PDFE) ASIC together with an 8052 based microcontroller forms a chip set being developed by the European Space Agency (ESA) for compact low cost scientific energetic particle instrumentation. Driving requirements of low noise and power consumption led to the selection of a single configurable analogue channel followed by an internal 8-bit ADC. Low mass and volume necessitated for space applications require on-chip integration of supporting functions such as discriminators, independent coincidence event detection and an efficient serial control interface.

  • Authors: Bengt Johlander (ESA/ESTEC SCI-SO), Sandi Habinc and Peter Sinander (ESA/ESTEC TOS-ESM), et al (pdf available)

A Microcontroller with Built-in Support for CCSDS Telecommand and Telemetry

A microcontroller based on the well-known Intel 8052 device has been developed by Transwitch (former ADV Engineering). Engineering samples have been produced in Q3/2001 in Atmel MG2-RT technology. The ADV80S32 device has built-in support for CCSDS telecommand and telemetry and targets to applications with moderate processing requirements but needing high safety and easy accommodation of equipment interfaces.

  • Authors: Marc Pollina (ADV Engineering), Peter Sinander and Sandi Habinc (ESA/ESTEC TOS-ESM) (pdf available)
  • ADV80S32 DataSheet (pdf available)

Validation of the 80S32 has been performed in 2008/2009 by Integrated Systems Development SA (ISD), resulting in the following dissemination material:

  • 80S32 Errata Sheet (pdf available)
  • 80S32 Validation Report (pdf available)
  • 80S32 Radiation Report (pdf available)

New On-board Microprocessors

Presentation of the 80S32 microcontroller and the LEON project at the Euopean Geophysical Society (EGS) 2002. (pdf available)

The TeamSat Data Handling System

TeamSat is the first ESA spacecraft to be flown with ESA/CCSDS compliant TM and TC systems and the first spacecraft anywhere to exploit the adaptive, asynchronous TM capabilities they support. The paper presents the data handling system of the TeamSat dual spacecraft.

  • Authors: Calum Smith, Peter Sinander, Sandi Habinc (ESA/ESTEC TOS-ESM), et al (pdf available)

Low cost, ASIC based Telemetry and Telecommand Systems - The TeamSat Experience

The TeamSat dual spacecraft launched by the Ariane 502 test launch was completed in record time and very low cost. The data handling system was ready to support final integration and testing in 6 months despite the fact it had to be designed from scratch.

  • Authors: Calum Smith, Peter Sinander, Sandi Habinc (ESA/ESTEC TOS-ESM), et al (pdf available)

TM/TC Interface Glue Logic for TeamSat Spacecraft

Large part of the glue logic for the TeamSat TM/TC system was implemented in two Field Programmable Gate Arrays (FPGAs). This document specifies all functional requirements. It is assumed that the reader has previous knowledge about ESA/CCSDS packet TM/TC standards and components implementing them.

  • Author: Sandi Habinc (ESA/ESTEC TOS-ESM) (pdf available)

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