A Virtual Platform is a software based system that can fully mirror the functionality of a target System-on-Chip or board. These virtual platforms combine high-speed processor simulators and high-level, fully functional models of the hardware building blocks, to provide an abstract, executable representation of the hardware to software developers and to system architects.
When used in the design and development of modern mixed Hardware/Software systems, Virtual Platforms (VPs) have the following advantages:
- A VP enables early software development which can start in advance of silicon, RTL simulation, or FPGA prototype availability.
- A VP provides high controllability: physical hardware cannot usually be stopped at once and it cannot be completely and un-intrusively inspected. A VP, being a software program, can be fully managed and customized by the hardware designed to address its needs.
- A VP provides full visibility: at any time, a user can get information regarding any part of the system (processor core, buses, peripherals, or environment models). The information can be analyzed and acted upon in any way by the end user.
- A VP provides determinism: being able to reproduce intermittent problems or complex timing-related problems on physical hardware is difficult. A VP, instead, provides determinism in the form of repeatability of a test case where the user will get the exact same behavior over and over again.
- A VP optimizes group interaction: VPs, representing the current status of the system being designed, can easily be shared across distributed teams; VPs also improve communication and interaction between hardware and software design teams.
Virtual Prototyping at ESA
The European Space Agency is currently promoting the development of a Virtual Platform based on GreenSocs; such Virtual Platform will integrate the SystemC IP-Cores produced in parallel activities.
See the Related links for more details on such activities.