Design, Manufacture & Test of a Single-chip Ka-band Doherty Power Amplifier

Ka-band is now increasingly popular for high throughput fixed and mobile satellite services, offering the potential for significantly improved capability over the conventional lower frequency band allocations.  High Throughput Satellites (HTS) are in operation which are characterised by multiple high-gain beams which allow closing the link with relatively small user terminals, and also frequency reuse which allows more efficient use of the available spectrum and therefore an increase in payload transmission capacity. The consequences of such satellite trends mean, however, a significant impact on payload complexity and more demanding requirements for the transmit solid-state high-power amplifier.

To reach the kind of performance required, an amplifier is needed with high power and high linearity. For spaceborne operation, high efficiency is also a key parameter due to the limited on-board prime power afforded by the fixed solar panel surface area, in addition to the limited size and mass of the thermal management system. Classical amplifiers have a maximum efficiency close to their output power saturation, however the linearity is poor at this operating point. Increasing the range of output power where the efficiency is optimal, leads to a better overall linearity performance. This is especially relevant for modern complex signal modulations which have high peak to average power ratios (PAPR) and therefore require a high output power back-off in order to maintain signal integrity.

For this scenario, the Doherty Power Amplifier (DPA) is considered a promising architectural candidate. In simple terms, each Doherty amplifier is implemented by combining the outputs of two individual sub-amplifiers; a class AB ‘main’ amplifier and in the majority of cases, a class C ‘peaking’ amplifier.  The concept is to bias each amplifier so that the class C amplifier ‘tops up’ the signal when the class AB amplifier begins to go into compression. In this way the overall amplifier maintains a good level of efficiency over an extended output power back-off range (i.e. for high PAPR signals), and can also maintain a satisfactory level of signal integrity.

For this activity, a Gallium Nitride (GaN) on Silicon Carbide technology was chosen.

It exhibits a high-power density and good thermal qualities therefore allowing reliable high-power performance at high temperatures.  The activity was led by United Monolithic Semiconductors, France, who are also the provider of the European GaN 0.15 µm gate length technology used.  Thales AVS-MIS, France, supported as subcontractor, responsible for the technical specifications based on state-of-the-art market analysis and survey, and provided valuable Noise Power Ratio (NPR) linearity measurements on the manufactured MMICs over frequency, temperature, and instantaneous bandwidth.

Following an initial market survey by Thales AVS-MIS, two sets of specifications were targeted:  20W saturated power (10W operating) for Array Fed Reflector (AFR) systems, and 10W saturated (5W operating) for Direct Radiating Aperture (DRA) systems. Key achievements include: 

• Two full GaN wafer runs on UMS GH15-10 were designed, manufactured, and tested.
• Final MMIC performance was considered state-of-the-art, giving PAE > 34% from 17.3 –20.2 GHz on-wafer for both 10W and 20W circuits. Output power flexibility with supply Voltage was demonstrated.
• Results were achieved for a MMIC back face temperature of 105°C and a junction temperature <160°C (ECSS-Q-ST-30-11C-Rev.2 - EEE Component Derating Requirements).
• Linearity performance was tested, demonstrating some benefits over Class AB designs in certain circumstances (e.g. instantaneous bandwidth <1.5GHz, etc.)
• A paper was accepted for publication at IMS MTT-S 2022, in Denver, Colorado USA.
• One version of DPA MMIC was added to the UMS catalogue for direct sales.

T506-503ET closed in 2022.